Overview

A low-power control and data acquisition platform was designed and constructed to drive the mechanical components of the system in order to support low power sample preparation. This system component serves two purposes. First, it acts as a control of the sample preparation system during sample collection, preparation and disposal. The secondary purpose is to perform the measurement sequence. These sample collection and preparation process is a slow process that places significant power demands on the system while the data acquisition step requires high, speed precision analog to digital conversion (ADC) and processing of the sampled data.

Approach

In order to meet both requirements a sampling/control system was designed and fabricated. This system was built around an embedded micro controller and designed to interface with exiting low power wireless sensing systems to enable remote autonomous data acquisition and control. This enables the system to operate as a wired peripheral to a PC type system or as a part of a network of sensing systems. The independent micro controller facilitates long term low power autonomous sampling with discrimination at the sensor to allow for user notification in the case of predefined and remotely configurable sensing criteria is met. As a most basic example the remote system can sample contaminate levels generating alerts if they cross a user-defined threshold. The embedded control in the system permits remote update of the alert criteria and remotely altering the sampling process.

Systems/Experiments

Hardware

The Sampling/Control system is based around Atmel's ATMega128 micro controller. This micro controller is designed for embedded low power application. The micro controller has minimal power consumption and the ability to be put into a deep sleep state between samples significantly extending the lifetime of the sampling system.

The sampling components are consist of two amplification channels connected to a high speed precision ADC. One of the amplification paths is fully digitally configurable permitting remote reconfiguration. The primary front end is comprised a 4 channel analog multiplexer feed into a digitally controlled variable gain amplifier, configurable for gains of 1x to4096x. The output of this amplifier is connected to one channel of a 4 channel 16bit ADC. The second amplification path is a generic instrumentation amplification system that, while not remotely configurable, is generic enough to be configured to handle most cases that are outside the limits of the primary amplification path. The additional unused ADC inputs are exposed to allow for up to two externally amplified signals to be measured directly by the system.

The control peripherals are somewhat more limited in scope. A number of generic input/output pins are exposed for direct use in controlling attached peripherals. In addition to high current FET switches to control the higher current devices such as motors and valves during sample preparation process.

Software

The system is programmed using the SOS (http://nesl.ee.ucla.edu/projects/SOS/) operating system developed here at UCLA for embedded sensing systems. This operating system is designed around remote wireless operation and system reconfiguration. The OS is a modular operating system permitting the loading and unloading of modules onto a running system to update system functionality. It also has support for extended autonomous running with extended periods of operation of the device in low power sleep.

In collaboration with the SOS developers, significant contributions were make to the operating system. These included the development of drivers to support all of the system peripherals and test applications to exercise the system in a similar mode to the intended use of the final system and test applications to verify the functionality of all subsystems. Support for high speed interaction with an external ADC was added to the system.

Testing

The hardware was incrementally assembled allowing for the testing of individual subsystems as they were added. All discovered errata were fixed and the individual systems were tested. All system components work as specified in the design process. Multiplexing between channels, digitally selecting gain and data acquisition approaching the limitations of the hardware have been verified. After the operating system updates the ADC we have demonstrated sampling at rates in excess of 2.5 KHz, including the necessary data processing for local data reduction and discrimination. In summary, the functionality of all core system components are tested and meet the intended design criteria.

Accomplishments

A new low-power sensor interface board was designed, prototyped, and tested, along with control software.

Future Directions

Upcoming steps include further testing of the system to fully characterize the abilities of the platform, and integration of the control platform with the mechanical components of the system. This may involve construction of interfaces to the external systems in the cases of voltage or current demands outside the abilities of the control system.

Additional testing of the data acquisition system is also planned. This will be done by driving the system with simulated waveforms and analyzing the response. This will be used to probe the limits of the system and assess system sensitivity to degradation of the inputs to the system. This will also involve the development of algorithms to correct for these effects and maximize the accuracy of the measurements.

People

• Naim Busek, UCLA, graduate student
• Jack Judy, UCLA, EE faculty